1. Field of the Invention
The present invention relates to a control circuit for controlling a radio frequency (RF) signal and, more particularly, to a split power control circuit for providing relatively precise control of an RF signal. In order to provide relatively more precise control to provide relatively fine adjustment, the RF signal is split into a plurality of branches. A switched circuit or circuit element is connected to one or more of the branches of the RF signal line to provide relatively fine adjustment of the RF signal. The split power control circuit may be implemented as a switch, such as a solid state switch, and a serially connected circuit or circuit element, such as a resistance or reactance to provide relatively precise amplitude or phase control, respectively, of an RF signal line. In another embodiment of the invention, a solid state switch and a serially connected circuit or circuit element, such as a resistance or reactance, are connected between an RF signal line and ground. The gate terminal of the switch is capacitively coupled to the switch terminal (i.e. source or drain) connected to the RF signal line, forcing the gate biasing element to be fixed rather than switched load to improve circuit performance.
2. Description of the Prior Art
Various microwave and millimeter wave electronic systems which require relatively precise amplitude and/or phase control are known. Examples of such electronic system include bear, steering phased arrays, nulling antennas, as well as multibeam antennas. Such electronic systems are known to employ monolithic microwave integrated circuits (MMICs) for amplitude and phase control functions. Such circuits are known to be implemented using either continuously variable (analog) circuits or stepped (digital) circuits. Digital control circuits are known to be often preferred, since such circuits can provide relatively lower levels of intermodulation products, are less temperature and process sensitive, require less calibration, and can be implemented with standard MMIC devices, such as a MESFET or HEMT.
A known attenuator circuit is illustrated in FIG. 1. Such a circuit is known as a loaded-line attenuator and includes a solid state switch, such as a HEMT having gate, drain and source thrills, for connecting and disconnecting a relatively high resistance load between an RF signal line and ground. The switched resistance is known to be selected to be relatively large to make it essentially transparent to the RF signal line to which it is coupled. Gate bias elements are connected to the gate of the HEMT. Such gate bias elements are known to include either a relatively large resistor or a quarter-wave bias stub, as illustrated in FIGS. 2 and 3. A control voltage Vct1 is applied to the resistor or quarter-wave bias stub which, in turn, controls the HEMT to connect the high impedance load to the RF line.
In order to provide relatively high precision amplitude and phase control, switched attenuators and phase shifting circuits must be able to provide fine as well as coarse amplitude and phase increments. The minimum amplitude and phase increments are known to be limited as discussed below.
In order to obtain relatively high-precision control from a loaded-line attenuator, a relatively large switched resistor is employed. For very high precision (i.e. fine-resolution), it is found that the loaded-line attenuator cannot provide good RF performance; more specifically, it cannot provide low-phase error. (Phase error is defined as the difference in phase of the transmitted RF signal with the attenuator in the "on" versus "off" states.) This is due to the fact that the source terminal of the solid state switch and the load resistor possess a certain unavoidable capacitance to ground. When the solid state switch is "on", these capacitances are "seen" as part of the load being switched, and introduce a phase shift. In addition, the bias circuitry as discussed below has similar parasitic effects.
Thus, beyond a certain level of resolution, the performance of a loaded-line attenuator degrades. In addition, there is a certain limit of resolution beyond which the loaded-line attenuator cannot reach, even with degraded phase error. This is due to the fact that the solid state switch does not provide an infinite impedance in its "off" state, and, in addition, the fact that the load resistor cannot achieve an infinitely high-impedance value, due to the parasitic capacitances to ground of the load resistor and the terminal of the solid state switch on the load end. In summary, beyond a certain level of resolution, the loaded-line attenuator provides degraded RF performance. Moreover, at a relatively higher level of resolution, the loaded-line attenuator reaches a limit beyond which it cannot achieve greater resolution.
A resolution limit also applies to the loaded-line phase shifter. The loaded-line phase shifter operates by employing a solid state switch to connect or disconnect a capacitive load to an RF line. However, even with no capacitive load, there is some effective load capacitance, due to the capacitance to ground of the load end of the solid state switch. The finite impedance of the solid state switch also contributes to this resolution limit. If the switched capacitive load approached an infinite impedance, then the impedance of the "off" state of the solid state switch becomes relatively low in comparison to that of the load, so that the load will appear to be "switched on", whether the solid state switch is in its on or off state. In summary, the finite impedance of the switched capacitive load, as well as that of the solid state switch, result in a limit on the resolution achievable by a loaded-line phase shifter. As for the loaded-line attenuator, parasitic effects of the bias circuit, as described below, contribute further to this performance limitation.
More specifically, as shown in FIG. 2, a relatively large MMIC resistor is known to be used as a gate bias element. Such an MMIC resistor will exhibit a relatively high impedance. However, the impedance cannot be selected to be arbitrarily large, because the physical structure of the resistor is such that it does not behave electrically as a pure resistance. Rather, it behaves as a network of distributed series resistances and shunt capacitances to ground. Using standard FET switch topology, the gate resistor behaves as a switched capacitive load in parallel with the intended switched load is the circuit. This is due to the fact that it is electrically coupled to the intended switched load through the gate-source capacitance of the FET. As used in an attenuator circuit, this parasitic load induces a phase error which cannot be tuned out. In the case of a phase shifting circuit, the gate bias resistor can introduce additional phase shift which limits the minimum phase shift that can be achieved with the circuit topology.
As mentioned above, a quarter-wave bias stub can also be used as a gate bias element for the HEMT. Such a quarter-wave bias stub can be made to exhibit essentially infinite impedance at the center frequency of circuit operation. However, the impedance of the quarter-wave bias stub drops to a finite impedance at frequencies off the center frequency. As such, in a loaded line-type attenuator, the quarter-wave stub introduces phase error, except at the design center frequency.
In a loaded-line phase shifter, it introduces a variation of phase shift as a function of frequency, which is generally deleterious to the performance of the system in which it is used.